Electronic devices, such as tablets, computers, copiers, digital cameras, smart phones, control systems and automated teller machines, among others, often employ electronic components which leverage chip package assemblies for increased functionality and higher component density. Conventional chip package schemes often utilize a package substrate, often in conjunction with a through-silicon-via (TSV) interposer, to enable a plurality of integrated circuit (IC) dice to be mounted to a single package substrate. The IC dice may include memory, logic or other IC devices.
Chip package assemblies often utilize power management integrated circuit (PMIC) dice to control the power requirements. A PMIC die is a solid state device, such as an integrated circuit or system block in a system on chip, configured to the control power requirements of a host device or system. PMIC dice may perform one or more power management functions, such as DC to DC power conversion, battery charging, power source selection, voltage scaling, and power sequencing, among others. Exemplary circuits residing the in PMIC die may include, but are not limited to, one or more of a low-dropout regulator, pulse frequency modulator, switching amplifier, and others.
Power is generally provided to conductive contact pads formed on the bottom of the PMIC die through traces formed on a circuit printed board (PCB) to which the PMIC die is mounted. Power or other signal generated by the PMIC die is also routed from conductive pads formed on the bottom of the PMIC die through traces formed on the PCB to an integrated circuit (IC) die (or chip package assembly) mounted to the PCB. The length of the traces disposed on the PCB, along with the solder connections, contribute adversely to device performance, particularly as the power requirements and complexity of chip packages increase.
Therefore, a need exists for an improved architecture for IC die to PMIC die connection.